A new formulation for the design of FIR filters with reduced hardware implementation complexity

Z. G. Feng; Ka Fai Cedric Yiu

doi:10.1109/ICGCS.2010.5543059

A new formulation for the design of FIR filters with reduced hardware implementation complexity

Research output: Chapter in book / Conference proceeding › Conference article published in proceeding or book › Academic research › peer-review

1 Citation (Scopus)

Abstract

In this paper, we consider the design of finite-impulse response (FIR) filters, where the coefficients are expressed as sums of signed powers-of-two (SPT) terms. To consume less energy, the hardware implementation complexity is required to be reduced. That is, we need to minimize the number of SPT terms, subject to a given performance requirement This can be formulated as an integer programming problem and can be transformed into a simplified one with a conversion method, where the number of the variables is reduced. Then, an efficient algorithm based on discrete steepest descent algorithm is developed for solving this problem. For illustration, two numerical examples are solved.

Original language	English
Title of host publication	1st International Conference on Green Circuits and Systems, ICGCS 2010
Pages	242-246
Number of pages	5
DOIs	https://doi.org/10.1109/ICGCS.2010.5543059
Publication status	Published - 20 Sept 2010
Event	1st International Conference on Green Circuits and Systems, ICGCS 2010 - Shanghai, China Duration: 21 Jun 2010 → 23 Jun 2010

Conference

Conference	1st International Conference on Green Circuits and Systems, ICGCS 2010
Country/Territory	China
City	Shanghai
Period	21/06/10 → 23/06/10

Keywords

FIR filters
SPT

ASJC Scopus subject areas

Hardware and Architecture
Electrical and Electronic Engineering

More information

10.1109/ICGCS.2010.5543059

Cite this

@inproceedings{d58e185f7bed4ff785f7fed4403eaf43,

title = "A new formulation for the design of FIR filters with reduced hardware implementation complexity",

abstract = "In this paper, we consider the design of finite-impulse response (FIR) filters, where the coefficients are expressed as sums of signed powers-of-two (SPT) terms. To consume less energy, the hardware implementation complexity is required to be reduced. That is, we need to minimize the number of SPT terms, subject to a given performance requirement This can be formulated as an integer programming problem and can be transformed into a simplified one with a conversion method, where the number of the variables is reduced. Then, an efficient algorithm based on discrete steepest descent algorithm is developed for solving this problem. For illustration, two numerical examples are solved.",

keywords = "FIR filters, SPT",

author = "Feng, {Z. G.} and Yiu, {Ka Fai Cedric}",

year = "2010",

month = sep,

day = "20",

doi = "10.1109/ICGCS.2010.5543059",

language = "English",

isbn = "9781424468775",

pages = "242--246",

booktitle = "1st International Conference on Green Circuits and Systems, ICGCS 2010",

note = "1st International Conference on Green Circuits and Systems, ICGCS 2010 ; Conference date: 21-06-2010 Through 23-06-2010",

}

A new formulation for the design of FIR filters with reduced hardware implementation complexity. / Feng, Z. G.; Yiu, Ka Fai Cedric.
1st International Conference on Green Circuits and Systems, ICGCS 2010. 2010. p. 242-246 5543059.

Research output: Chapter in book / Conference proceeding › Conference article published in proceeding or book › Academic research › peer-review

TY - GEN

T1 - A new formulation for the design of FIR filters with reduced hardware implementation complexity

AU - Feng, Z. G.

AU - Yiu, Ka Fai Cedric

PY - 2010/9/20

Y1 - 2010/9/20

N2 - In this paper, we consider the design of finite-impulse response (FIR) filters, where the coefficients are expressed as sums of signed powers-of-two (SPT) terms. To consume less energy, the hardware implementation complexity is required to be reduced. That is, we need to minimize the number of SPT terms, subject to a given performance requirement This can be formulated as an integer programming problem and can be transformed into a simplified one with a conversion method, where the number of the variables is reduced. Then, an efficient algorithm based on discrete steepest descent algorithm is developed for solving this problem. For illustration, two numerical examples are solved.

AB - In this paper, we consider the design of finite-impulse response (FIR) filters, where the coefficients are expressed as sums of signed powers-of-two (SPT) terms. To consume less energy, the hardware implementation complexity is required to be reduced. That is, we need to minimize the number of SPT terms, subject to a given performance requirement This can be formulated as an integer programming problem and can be transformed into a simplified one with a conversion method, where the number of the variables is reduced. Then, an efficient algorithm based on discrete steepest descent algorithm is developed for solving this problem. For illustration, two numerical examples are solved.

KW - FIR filters

KW - SPT

UR - http://www.scopus.com/inward/record.url?scp=77956580321&partnerID=8YFLogxK

U2 - 10.1109/ICGCS.2010.5543059

DO - 10.1109/ICGCS.2010.5543059

M3 - Conference article published in proceeding or book

SN - 9781424468775

SP - 242

EP - 246

BT - 1st International Conference on Green Circuits and Systems, ICGCS 2010

T2 - 1st International Conference on Green Circuits and Systems, ICGCS 2010

Y2 - 21 June 2010 through 23 June 2010

ER -

A new formulation for the design of FIR filters with reduced hardware implementation complexity

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Keywords

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