Abstract
When making video processor design, conventional design exploration methodologies take extremely long time in parameter optimization but the final design may not necessarily meet the application requirements since the architecture cannot deviate too much from the initial design. To speed up the design process, statistical performance models were used to guide the simulation; however their accuracy is questionable. In this paper, a new 3-phase design exploration methodology for video processor is proposed. It makes use of an almost cycle-accurate performance model to provide information for refining the processor architecture. It can derive the optimal architecture in a much shorter period of time than the conventional methods. We successfully implemented a few video coding/decoding applications on the video processor derived from the proposed methodology. Simulation results show that it outperforms other video processors in both cost and performance perspectives.
Original language | English |
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Title of host publication | ISCAS 2012 - 2012 IEEE International Symposium on Circuits and Systems |
Pages | 1331-1334 |
Number of pages | 4 |
DOIs | |
Publication status | Published - 28 Sept 2012 |
Event | 2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012 - Seoul, Korea, Republic of Duration: 20 May 2012 → 23 May 2012 |
Conference
Conference | 2012 IEEE International Symposium on Circuits and Systems, ISCAS 2012 |
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Country/Territory | Korea, Republic of |
City | Seoul |
Period | 20/05/12 → 23/05/12 |
ASJC Scopus subject areas
- Hardware and Architecture
- Electrical and Electronic Engineering