Abstract
A digital additive white Gaussian noise (AWGN) generator has recently become a public focus with the increasing demand of hardware simulation in researches on communication discipline. Some successful ideas of software, such as the Box-Muller method, are then proposed and implemented into hardware platforms and the architecture design has attracted new studies. Then high-precision small-error Gaussian noise generators appeared in literatures from time to time. Considering that the academic applications prefer higher throughput and the data resolution are always limited by hardware resources, we propose to use a straightforward architecture based on a Gaussian lookup table in these cases. In this paper, such an architecture has been fully investigated and the corresponding FPGA implementation gives out a high throughput of 800 million noise samples per second.
Original language | English |
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Title of host publication | IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
Pages | 117-120 |
Number of pages | 4 |
DOIs | |
Publication status | Published - 1 Jan 2015 |
Event | 2014 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2014 - Ishigaki Island, Okinawa, Japan Duration: 17 Nov 2014 → 20 Nov 2014 |
Conference
Conference | 2014 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2014 |
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Country/Territory | Japan |
City | Ishigaki Island, Okinawa |
Period | 17/11/14 → 20/11/14 |
ASJC Scopus subject areas
- Electrical and Electronic Engineering