A development of 6kV three-level NPC inverters with novel DC-link circuit and optimal dead-time configuration

Jian Liu, Shi Hong Qing, Xiao Ling Wen, Zi Cheng Li, Wei Bing Hu, C. Y. Chung

Research output: Chapter in book / Conference proceedingConference article published in proceeding or bookAcademic researchpeer-review

Abstract

Because of the existence of reverse recovery time of the clamp diode and di/dt-chokes diode of three-level natural point camped (NPC) inverter, the partial over current phenomena will occur at the capacitive load or inductive load condition. This problem limits the energy densities of the system and do harm to the power switch devices. To avoid this over current problem, a novel circuit of three-level NPC inverter is presented. The partial over current problem of traditional three-level NPC inverter can be solved by using this new circuit. At the same time, the optimal dead-time configuration of PWM control technology is presented. In this paper, the system parameter selection and test circuit of the new inverters are analyzed in detail. After using those methods, the security and stability of system operating have been enhanced obviously. At last, some experimental results have been presented and discussed.

Original languageEnglish
Title of host publicationProceedings - 2012 IEEE International Symposium on Industrial Electronics, ISIE 2012
Pages1957-1961
Number of pages5
DOIs
Publication statusPublished - Jul 2012
Event21st IEEE International Symposium on Industrial Electronics, ISIE 2012 - Hangzhou, China
Duration: 28 May 201231 May 2012

Publication series

NameIEEE International Symposium on Industrial Electronics

Conference

Conference21st IEEE International Symposium on Industrial Electronics, ISIE 2012
Country/TerritoryChina
CityHangzhou
Period28/05/1231/05/12

Keywords

  • DC-Link
  • dead-time configuration
  • over current
  • three-level NPC inverter

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Control and Systems Engineering

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