Abstract
A 2-D analytical threshold-voltage model for ultra-thin-body MOSFET with buried insulator and high-k gate dielectric is established by solving the 2-D Poisson's equation for the gate-dielectric, channel and buried-insulator regions. The validity of the model is confirmed by comparing with experimental data and other models. Using the model, the influences of gate-dielectric permittivity, buried-insulator permittivity, channel thickness, buried-insulator thickness and channel doping concentration on threshold behaviors are investigated. It is found that the threshold behaviors can be improved by using buried insulator with low permittivity, thin channel and high channel doping concentration. However, the threshold performance would be degraded when high-k gate dielectric is used due to enhanced fringing-field effect.
Original language | English |
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Pages (from-to) | 24-33 |
Number of pages | 10 |
Journal | Microelectronics Reliability |
Volume | 57 |
DOIs | |
Publication status | Published - 1 Feb 2016 |
Keywords
- GeOI/GeON MOSFETs
- High-k gate dielectric
- Threshold voltage
- Ultra-thin-body
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Atomic and Molecular Physics, and Optics
- Condensed Matter Physics
- Safety, Risk, Reliability and Quality
- Surfaces, Coatings and Films
- Electrical and Electronic Engineering