A 2-D analytical threshold-voltage model for GeOI/GeON MOSFET with high-k gate dielectric

Feng Ji; J. P. Xu; L. Liu; Wing Man Tang; P. T. Lai

doi:10.1016/j.microrel.2015.12.004

A 2-D analytical threshold-voltage model for GeOI/GeON MOSFET with high-k gate dielectric

Feng Ji, J. P. Xu, L. Liu, Wing Man Tang, P. T. Lai

Research output: Journal article publication › Journal article › Academic research › peer-review

1 Citation (Scopus)

Abstract

A 2-D analytical threshold-voltage model for ultra-thin-body MOSFET with buried insulator and high-k gate dielectric is established by solving the 2-D Poisson's equation for the gate-dielectric, channel and buried-insulator regions. The validity of the model is confirmed by comparing with experimental data and other models. Using the model, the influences of gate-dielectric permittivity, buried-insulator permittivity, channel thickness, buried-insulator thickness and channel doping concentration on threshold behaviors are investigated. It is found that the threshold behaviors can be improved by using buried insulator with low permittivity, thin channel and high channel doping concentration. However, the threshold performance would be degraded when high-k gate dielectric is used due to enhanced fringing-field effect.

Original language	English
Pages (from-to)	24-33
Number of pages	10
Journal	Microelectronics Reliability
Volume	57
DOIs	https://doi.org/10.1016/j.microrel.2015.12.004
Publication status	Published - 1 Feb 2016

Keywords

GeOI/GeON MOSFETs
High-k gate dielectric
Threshold voltage
Ultra-thin-body

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Atomic and Molecular Physics, and Optics
Condensed Matter Physics
Safety, Risk, Reliability and Quality
Surfaces, Coatings and Films
Electrical and Electronic Engineering

More information

10.1016/j.microrel.2015.12.004

Cite this

@article{45c9a84e7288488fb72465fef9cd5393,

title = "A 2-D analytical threshold-voltage model for GeOI/GeON MOSFET with high-k gate dielectric",

abstract = "A 2-D analytical threshold-voltage model for ultra-thin-body MOSFET with buried insulator and high-k gate dielectric is established by solving the 2-D Poisson's equation for the gate-dielectric, channel and buried-insulator regions. The validity of the model is confirmed by comparing with experimental data and other models. Using the model, the influences of gate-dielectric permittivity, buried-insulator permittivity, channel thickness, buried-insulator thickness and channel doping concentration on threshold behaviors are investigated. It is found that the threshold behaviors can be improved by using buried insulator with low permittivity, thin channel and high channel doping concentration. However, the threshold performance would be degraded when high-k gate dielectric is used due to enhanced fringing-field effect.",

keywords = "GeOI/GeON MOSFETs, High-k gate dielectric, Threshold voltage, Ultra-thin-body",

author = "Feng Ji and Xu, {J. P.} and L. Liu and Tang, {Wing Man} and Lai, {P. T.}",

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T1 - A 2-D analytical threshold-voltage model for GeOI/GeON MOSFET with high-k gate dielectric

AU - Ji, Feng

AU - Xu, J. P.

AU - Liu, L.

AU - Tang, Wing Man

AU - Lai, P. T.

PY - 2016/2/1

Y1 - 2016/2/1

N2 - A 2-D analytical threshold-voltage model for ultra-thin-body MOSFET with buried insulator and high-k gate dielectric is established by solving the 2-D Poisson's equation for the gate-dielectric, channel and buried-insulator regions. The validity of the model is confirmed by comparing with experimental data and other models. Using the model, the influences of gate-dielectric permittivity, buried-insulator permittivity, channel thickness, buried-insulator thickness and channel doping concentration on threshold behaviors are investigated. It is found that the threshold behaviors can be improved by using buried insulator with low permittivity, thin channel and high channel doping concentration. However, the threshold performance would be degraded when high-k gate dielectric is used due to enhanced fringing-field effect.

AB - A 2-D analytical threshold-voltage model for ultra-thin-body MOSFET with buried insulator and high-k gate dielectric is established by solving the 2-D Poisson's equation for the gate-dielectric, channel and buried-insulator regions. The validity of the model is confirmed by comparing with experimental data and other models. Using the model, the influences of gate-dielectric permittivity, buried-insulator permittivity, channel thickness, buried-insulator thickness and channel doping concentration on threshold behaviors are investigated. It is found that the threshold behaviors can be improved by using buried insulator with low permittivity, thin channel and high channel doping concentration. However, the threshold performance would be degraded when high-k gate dielectric is used due to enhanced fringing-field effect.

KW - GeOI/GeON MOSFETs

KW - High-k gate dielectric

KW - Threshold voltage

KW - Ultra-thin-body

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JF - Microelectronics and Reliability

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