Abstract
3-D CMOS IC technology built on two layers of large grain polysilicon is presented. These stacked layers are vertically interconnected allowing shorter interconnect to improve the logic speed. The large grain polysilicon-on-insulator (LPSOI) film is formed by the recrystallization of amorphous silicon through Metal Induced Lateral Crystallization (MILC). The crystallization region obtained can cover multiple transistors and the grain size is much larger than the transistor size. An oxide layer separates two layers of devices and forms an interlayer dielectric. The electrical performance of the LPSOI devices is presented. Inverters, ring-oscillators and shift registers further confirm that the recrystallized techniques forming the 3-D structures are feasible.
Original language | English |
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Title of host publication | 2001 6th International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2001 - Proceedings |
Publisher | IEEE |
Pages | 58-61 |
Number of pages | 4 |
Volume | 1 |
ISBN (Electronic) | 0780365208, 9780780365209 |
DOIs | |
Publication status | Published - 1 Jan 2001 |
Externally published | Yes |
Event | 6th International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2001 - Shanghai, China Duration: 22 Oct 2001 → 25 Oct 2001 |
Conference
Conference | 6th International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2001 |
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Country/Territory | China |
City | Shanghai |
Period | 22/10/01 → 25/10/01 |
ASJC Scopus subject areas
- Electrical and Electronic Engineering
- Electronic, Optical and Magnetic Materials